1. Field of the Invention
The present invention relates to a layout circuit, and in particular relates to a layout circuit applied on substrates, chips and printed circuit boards.
2. Description of the Related Art
As integrated circuit devices become faster and more complex, the interconnections between one device with another device or with other components on a circuit board may limit the performance achievable for an integrated circuit system. Integrated circuit devices, such as chips, once had only a few interconnections. Now, hundreds of interconnections are required in more complex devices, along with more and more signals transmitting between these interconnections. Thus, more interconnections for chips are required.
Chip packaging is often subject to a number of tradeoffs, particular between performance and cost. Furthermore, the design of a chip package may also impact the performance and cost of the circuit board with which the chip package is used. In particular, system performance is often hindered by noise encountered in signals transmitted between a chip package and a circuit board.
Extra signal layers of a printed circuit board can provide more signal paths. But, extra signal layers may increase additional cost in the manufacturing of printed circuit boards and more defect occurrence during manufacturing. Thus, providing more signal paths without increasing signal layers is an important issue.